Cholesky Solver 6x6- ACE808066

Overview

The ACE808066 is a high-velocity, deterministic hardware accelerator designed for the real-time execution of Cholesky 6x6 solver algorithms. It provides a production-ready "Math-to-Silicon" pipeline that transforms complex mathematics into high-frequency, bit-perfect FPGA logic.

By offloading recursive mathematical kernels from a system’s primary processor, the core enables extreme computational throughput with zero execution jitter.

With its 150K operations per second, the ACE808066 may be used in real time systems avoiding the need to transfer back and forth data between hardware and software.

The core is engineered as a universal mathematical fabric for high-stakes environments. It is specifically optimized for:

Extended Kalman Filters (EKF): EKFs are the backbone of robot localization and state estimation. The correction step requires inverting a covariance matrix via Cholesky decomposition. A 6x6 matrix perfectly maps to tracking 6 degrees of freedom (DoF)—such as 3D position (x, y, z) and 3D orientation (roll, pitch, yaw).
Model Predictive Control (MPC): Small-scale MPC controllers optimize a vehicle's trajectory on the fly. The core allows these optimization loops to run at kilohertz rates on small, power-efficient edge FPGAs. .
Inertial Navigation Systems (INS): Combining GPS data with IMU (Inertial Measurement Unit) data requires constant state updating. The deterministic microsecond grade execution time guarantees that the navigation loop can run well above 100 kHz.
Real-Time Ultrasound and MRI Reconstruction: Portable imaging devices use spatial filtering and beamforming to clean up raw sensor data.

The ACE808066 maintains a surprisingly lean resource utilization footprint that enables its implementation on the majority of the FPGA models.

The core is optimized for the AMD 7 Series FPGA, but ACE can easily port on any customer-selected FPGA (any vendor).

While the core is fully functional, ACE internal development procedures provide the possibility for the customer to adapt to their needs:

Matrix size
The FPGA model
Memory map
Core interfaces (e.g. the BRAM interfaces can be set to be controlled by an AXI BRAM Controller)

In contrast to software‑based implementations, the ACE808066 delivers architectural guarantees that general‑purpose processors cannot provide. By keeping all data resident inside the FPGA fabric, the core eliminates cache effects, DMA transfers, driver overhead, and any latency associated with moving data between hardware and software. This locality ensures that every execution follows the exact same timing path, resulting in strictly deterministic, jitter‑free behavior essential for real‑time control loops. Offloading the recursive kernel to dedicated logic also removes the most timing‑sensitive workload from the system processor, improving overall system parallelism and reducing power consumption by avoiding CPU burst activity.

Adopting the ACE808066 also accelerates development cycles by replacing months of low‑level mathematical implementation and numerical‑stability validation with a ready‑to‑use, fully verified hardware engine. Instead of designing, debugging, and stress‑testing a custom solver, engineering teams can integrate a proven, production‑grade core and focus their efforts on higher‑level system architecture. This reduces project risk, shortens time‑to‑deployment, and provides a measurable competitive advantage in markets where reliability, determinism, and rapid iteration are critical.

Key Features

Deterministic 1268 cycles Latency
Tested Clock Frequency: 200 MHz (timing closed with ample margin)
More than 150K operations per second at the tested frequency
Utilization less than 5% of the resources on a mid-range xc7k160tfbg484-3
Portable across FPGA families and vendors.
BRAM-based control interface

Theory of operation

The ACE808066 is a high-performance, deterministic hardware acceleration engine designed to solve a 6x6 linear system of equations in the form:

H*dx=-b

Where H is a 6x6 symmetric positive-definite matrix (typically a Hessian or information matrix in tracking and optimization loops), b is the 6x1 right-hand side vector, and dx is the 6x1 unknown correction vector.

To guarantee minimal, deterministic latency (1268 cycles), the engine avoids iterative relaxation methods and instead utilizes a direct solver architecture split into three highly pipelined, single-precision floating-point (IEEE-754 float32) computational phases.

Cholesky Factorization

The engine exploits the symmetric properties of the input matrix H by reading only the lower triangular entries (H{00} through H{55}).

It decomposes this matrix into a lower triangular matrix L and its conjugate transpose LT.

Diagonal Entries: Computed using a pipelined floating-point square root component.
Off-Diagonal Entries: Computed via a multiply-accumulate (MAC) reduction chain followed by a floating-point division step.

Forward Substitution

Once the lower triangular matrix L is resolved, the system solves the intermediate system L*y=-b. To optimize hardware state transitions and maximize throughput, the inversion of the vector b (c=-b) is executed inline during the initial step of the forward substitution pipeline. The intermediate vector y is solved row-by-row from y{0} up to y{5}.

Backward Substitution

Using the computed intermediate vector y and the transposed matrix LT, the engine executes a final backward substitution sweep. The computation runs in reverse order from dx{5} down to dx{0} to isolate the definitive correction vector. Because the operations are mapped onto dedicated, deterministic pipelined floating-point primitives, the execution time is strictly bounded and entirely free from timing jitter.

The ACE808066 core utilizes IEEE-754 Single-Precision (32-bit) floating-point arithmetic.

The full implemented equations are reported below:

# --- ACE808066 DETERMINISTIC CHOLESKY SOLVER ENGINE ---

# Input Symmetric Matrix: H00 to H55 (Lower triangular entries)

# Input Right Hand Side: b0 to b5

# Output Correction: dx0 to dx5

# --- 1. CHOLESKY FACTORIZATION (H = L * L^T) ---

# Row 0

L00 = sqrt(H00)

# Row 1

L10 = H10 / L00

L11 = sqrt(H11 - (L10 * L10))

# Row 2

L20 = H20 / L00

L21 = (H21 - (L20 * L10)) / L11

L22 = sqrt(H22 - ((L20 * L20) + (L21 * L21)))

# Row 3

L30 = H30 / L00

L31 = (H31 - (L30 * L10)) / L11

L32 = (H32 - ((L30 * L20) + (L31 * L21))) / L22

L33 = sqrt(H33 - ((L30 * L30) + (L31 * L31) + (L32 * L32)))

# Row 4

L40 = H40 / L00

L41 = (H41 - (L40 * L10)) / L11

L42 = (H42 - ((L40 * L20) + (L41 * L21))) / L22

L43 = (H43 - ((L40 * L30) + (L41 * L31) + (L42 * L32))) / L33

L44 = sqrt(H44 - ((L40 * L40) + (L41 * L41) + (L42 * L42) + (L43 * L43)))

# Row 5

L50 = H50 / L00

L51 = (H51 - (L50 * L10)) / L11

L52 = (H52 - ((L50 * L20) + (L51 * L21))) / L22

L53 = (H53 - ((L50 * L30) + (L51 * L31) + (L52 * L32))) / L33

L54 = (H54 - ((L50 * L40) + (L51 * L41) + (L52 * L42) + (L53 * L43))) / L44

L55 = sqrt(H55 - ((L50 * L50) + (L51 * L51) + (L52 * L52) + (L53 * L53) + (L54 * L54)))

# --- 2. FORWARD SUBSTITUTION (L * y = -b) ---

# Negating b elements directly inline

c0 = opposite(b0)

c1 = opposite(b1)

c2 = opposite(b2)

c3 = opposite(b3)

c4 = opposite(b4)

c5 = opposite(b5)

y0 = c0 / L00

y1 = (c1 - (L10 * y0)) / L11

y2 = (c2 - ((L20 * y0) + (L21 * y1))) / L22

y3 = (c3 - ((L30 * y0) + (L31 * y1) + (L32 * y2))) / L33

y4 = (c4 - ((L40 * y0) + (L41 * y1) + (L42 * y2) + (L43 * y3))) / L44

y5 = (c5 - ((L50 * y0) + (L51 * y1) + (L52 * y2) + (L53 * y3) + (L54 * y4))) / L55

# --- 3. BACKWARD SUBSTITUTION (L^T * dx = y) ---

dx5 = y5 / L55

dx4 = (y4 - (L54 * dx5)) / L44

dx3 = (y3 - ((L43 * dx4) + (L53 * dx5))) / L33

dx2 = (y2 - ((L32 * dx3) + (L42 * dx4) + (L52 * dx5))) / L22

dx1 = (y1 - ((L21 * dx2) + (L31 * dx3) + (L41 * dx4) + (L51 * dx5))) / L11

dx0 = (y0 - ((L10 * dx1) + (L20 * dx2) + (L30 * dx3) + (L40 * dx4) + (L50 * dx5))) / L00

Detailed Resource Utilization

The data below are representative of the AMD 7 series architecture. The percentage are relative to the budget friendly xc7k160tfbg484-3 .

Used CLB LUTs: 3681 (3.63%)
- LUT as logic: 3586
- LUT as Shift Registers: 95
CLB Registers: 4494 (2.22%)
CARRY4: 378
F7 Muxes:115
F8 Muxes: 48
CLB Tiles (in the verification project): 1234 (4.87%)
Used DSP: 5 (0.83%)
Used BRAM36K: 1 (0.31%)
Used BRAM18K: 0 (0.00%)
DNA PORT: 1

Timing and throughput

The core runs on two different clocks:

CLK_FAST with a maximum frequency of 200 MHz
CLK_SLOW that shall run at 50MHz (phase aligned with CLK_FAST)

CLK_SLOW is used for the ACE808066 initialization, while CLK_FAST is used for all the runtime operations.

In the verification project, the timing was closed with a robust 1.586ns timing margin and with 0 timing violations.

Interfaces and operation flow

The Cholesky 6x6 Solver core is packaged as an AMD IP core. Figure 1 illustrates the verification configuration.

Figure 1

The core is fully controlled through read/write operations on a BRAM (optionally accessible via an AXI BRAM_CONTROLLER). The instantiated BRAM is 1 True Dual Port with port A available to the user and port B managed by the internal Math Engine.

The BRAM has a width of 32 bits and a depth of 1024 locations. The core uses the first 67 locations, with the remaining ones completely available for the user via port(s) A (port(s) B are assigned to the internal Math Engine). Port(s) A operates in the user clock domain; Port(s) B operates in the internal engine clock domain.

The memory Map is reported below:

Memory Map

ACE808066_Cholesky_Core_Memory_Map

In addition to the BRAM interface, the core exposes:

Two clock slave interfaces:
- CLK_SLOW is used for the initialization and for the access to the DNA reader primitive ( 50MHz)
- CLK_FAST is used to drive the internal computation engine (Max Frequency: 200 MHz)
A BUSY pin that, when set to high, signals when the core is executing the initialization or its main function.

The core, at power-up, performs an initialization sequence that lasts (with CLK_SLOW @ 50 MHz) less than 5000 ns.

When the initialization is complete, the BRAM is populated with the DNA of the FPGA (see Memory Map).

Once the initialization is complete, the user may load the BRAM in accordance with the input reported in the Memory Map and,finally, set the START_CMD to 0x1.

The results are written in BRAM, in accordance with the memory map, after exactly 1268 clock cycles. The end of execution is communicated by the core by setting the START_CMD to 0x0 (in BRAM) and via the BUSY PIN (BUSY=0 indicates the core is in the IDLE state, ready for the new execution).

When the START_CMD is asserted, the core performs the entire computation. Execution cannot be stopped. Writing on the BRAM first 67 addresses during the execution will produce undefined results and it is not supported. The execution will always complete in the specified 1268 clock cycle window.

Note: if the USER_KEY is not correct, the core terminates in the specified timeframe, but produces unpredictable results.

Results and accuracy

To validate the numerical integrity and dynamic range stability of the ACE808066 computing fabric, the hardware engine was subjected to a rigorous, 30-stage hardware-in-the-loop simulation test sweep. The verification manifest intentionally sweeps the input symmetric matrix (H) and the right-hand-side vector (b) across multiple orders of magnitude, forcing the internal single-precision floating-point (float32) pipelines to calculate variations spanning from macro-scale values (104) down to sub-fractional micro-signals (10-8).

Testing was evaluated against an unconditioned double-precision software baseline model utilizing relative, percentage-based threshold constraints alongside absolute error boundaries. A relative error threshold of 0.01% was enforced as the strict failure margin to guarantee algorithmic convergence stability near matrix singularities and prevent catastrophic cancellation during the back-substitution division phases.

As compiled in the hardware validation report below, the core achieved 100% numerical equivalence with zero precision breaches across all evaluated operating envelopes.

Peak relative deviation was successfully bounded at 0.00251% under sub-fractional stress loading (Stage 24), while nominal tracking bounds routinely converged to 0.00000% error, demonstrating true IEEE-754 bit-perfect math propagation.

=======================================================================================

ACE808066 CHOLESKY SOLVER ENGINE: ACCURACY REPORT

=======================================================================================

--- Evaluation Stage 1 ---

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dx0 | -1.1237e+04 | -1.1237e+04 | 9.77e-04 | 0.00001% | PASS

dx1 | 9.3660e+03 | 9.3660e+03 | 0.00e+00 | 0.00000% | PASS

dx2 | 1.0122e+04 | 1.0122e+04 | 9.77e-04 | 0.00001% | PASS

dx3 | -2.2240e+03 | -2.2240e+03 | 2.44e-04 | 0.00001% | PASS

dx4 | -1.5283e+04 | -1.5283e+04 | 9.77e-04 | 0.00001% | PASS

dx5 | 3.0617e+03 | 3.0617e+03 | 0.00e+00 | 0.00000% | PASS

Result: STAGE 1 VERIFICATION SUCCESSFUL

--- Evaluation Stage 2 ---

---------------------------------------------------------------------------------------

dx0 | 3.9940e+00 | 3.9940e+00 | 2.38e-07 | 0.00001% | PASS

dx1 | -1.0133e+01 | -1.0133e+01 | 9.54e-07 | 0.00001% | PASS

dx2 | -1.4861e+00 | -1.4861e+00 | 1.19e-07 | 0.00001% | PASS

dx3 | -1.3950e+00 | -1.3950e+00 | 2.38e-07 | 0.00002% | PASS

dx4 | -8.0806e+00 | -8.0806e+00 | 0.00e+00 | 0.00000% | PASS

dx5 | -6.9571e+00 | -6.9571e+00 | 0.00e+00 | 0.00000% | PASS

Result: STAGE 2 VERIFICATION SUCCESSFUL

--- Evaluation Stage 3 ---

---------------------------------------------------------------------------------------

dx0 | -6.7858e-02 | -6.7858e-02 | 0.00e+00 | 0.00000% | PASS

dx1 | 3.7446e-03 | 3.7446e-03 | 1.86e-09 | 0.00005% | PASS

dx2 | 1.7282e-01 | 1.7282e-01 | 1.49e-08 | 0.00001% | PASS

dx3 | 2.3204e-01 | 2.3204e-01 | 1.49e-08 | 0.00001% | PASS

dx4 | -5.7424e-02 | -5.7424e-02 | 1.12e-08 | 0.00002% | PASS

dx5 | 5.2746e-02 | 5.2746e-02 | 3.73e-09 | 0.00001% | PASS

Result: STAGE 3 VERIFICATION SUCCESSFUL

--- Evaluation Stage 4 ---

---------------------------------------------------------------------------------------

dx0 | 1.0647e-03 | 1.0647e-03 | 0.00e+00 | 0.00000% | PASS

dx1 | 3.3800e-04 | 3.3800e-04 | 2.91e-11 | 0.00001% | PASS

dx2 | -1.1817e-04 | -1.1817e-04 | 7.28e-12 | 0.00001% | PASS

dx3 | 1.3362e-03 | 1.3362e-03 | 1.16e-10 | 0.00001% | PASS

dx4 | -1.5974e-04 | -1.5974e-04 | 1.46e-11 | 0.00001% | PASS

dx5 | -2.2337e-04 | -2.2337e-04 | 1.46e-11 | 0.00001% | PASS

Result: STAGE 4 VERIFICATION SUCCESSFUL

--- Evaluation Stage 5 ---

---------------------------------------------------------------------------------------

dx0 | -3.9262e-08 | -3.9262e-08 | 3.55e-15 | 0.00001% | PASS

dx1 | 3.4090e-07 | 3.4090e-07 | 2.84e-14 | 0.00001% | PASS

dx2 | 3.8861e-07 | 3.8861e-07 | 2.84e-14 | 0.00001% | PASS

dx3 | 9.6240e-09 | 9.6240e-09 | 8.88e-16 | 0.00001% | PASS

dx4 | -3.8390e-08 | -3.8390e-08 | 3.55e-15 | 0.00001% | PASS

dx5 | 8.4484e-08 | 8.4484e-08 | 2.13e-14 | 0.00003% | PASS

Result: STAGE 5 VERIFICATION SUCCESSFUL

--- Evaluation Stage 6 ---

---------------------------------------------------------------------------------------

dx0 | 1.5254e+04 | 1.5254e+04 | 1.95e-03 | 0.00001% | PASS

dx1 | -7.3613e+03 | -7.3613e+03 | 4.88e-04 | 0.00001% | PASS

dx2 | -8.9235e+03 | -8.9235e+03 | 0.00e+00 | 0.00000% | PASS

dx3 | -3.8477e+03 | -3.8477e+03 | 7.32e-04 | 0.00002% | PASS

dx4 | 1.1163e+04 | 1.1163e+04 | 9.77e-04 | 0.00001% | PASS

dx5 | 7.5455e+03 | 7.5455e+03 | 4.88e-04 | 0.00001% | PASS

Result: STAGE 6 VERIFICATION SUCCESSFUL

--- Evaluation Stage 7 ---

---------------------------------------------------------------------------------------

dx0 | 3.6109e+00 | 3.6109e+00 | 2.38e-07 | 0.00001% | PASS

dx1 | 1.1545e+01 | 1.1545e+01 | 0.00e+00 | 0.00000% | PASS

dx2 | -1.5075e+01 | -1.5075e+01 | 1.91e-06 | 0.00001% | PASS

dx3 | 2.8477e+00 | 2.8477e+00 | 2.38e-07 | 0.00001% | PASS

dx4 | -1.0057e+01 | -1.0057e+01 | 9.54e-07 | 0.00001% | PASS

dx5 | -2.5521e+00 | -2.5521e+00 | 0.00e+00 | 0.00000% | PASS

Result: STAGE 7 VERIFICATION SUCCESSFUL

--- Evaluation Stage 8 ---

---------------------------------------------------------------------------------------

dx0 | 1.9382e-01 | 1.9382e-01 | 1.49e-08 | 0.00001% | PASS

dx1 | -1.0722e-01 | -1.0722e-01 | 7.45e-09 | 0.00001% | PASS

dx2 | -2.4147e-01 | -2.4147e-01 | 2.98e-08 | 0.00001% | PASS

dx3 | -1.7650e-01 | -1.7650e-01 | 0.00e+00 | 0.00000% | PASS

dx4 | 1.5531e-02 | 1.5531e-02 | 4.66e-09 | 0.00003% | PASS

dx5 | 9.0536e-02 | 9.0536e-02 | 0.00e+00 | 0.00000% | PASS

Result: STAGE 8 VERIFICATION SUCCESSFUL

--- Evaluation Stage 9 ---

---------------------------------------------------------------------------------------

dx0 | 4.7784e-04 | 4.7784e-04 | 0.00e+00 | 0.00000% | PASS

dx1 | 9.7497e-04 | 9.7497e-04 | 5.82e-11 | 0.00001% | PASS

dx2 | -3.0270e-04 | -3.0270e-04 | 0.00e+00 | 0.00000% | PASS

dx3 | -6.4824e-04 | -6.4824e-04 | 5.82e-11 | 0.00001% | PASS

dx4 | -5.6711e-04 | -5.6711e-04 | 0.00e+00 | 0.00000% | PASS

dx5 | -4.2201e-04 | -4.2201e-04 | 2.91e-11 | 0.00001% | PASS

Result: STAGE 9 VERIFICATION SUCCESSFUL

--- Evaluation Stage 10 ---

---------------------------------------------------------------------------------------

dx0 | -1.5532e-07 | -1.5532e-07 | 1.42e-14 | 0.00001% | PASS

dx1 | -3.8287e-08 | -3.8287e-08 | 1.78e-14 | 0.00005% | PASS

dx2 | 2.0746e-07 | 2.0746e-07 | 1.42e-14 | 0.00001% | PASS

dx3 | 2.8202e-07 | 2.8202e-07 | 2.84e-14 | 0.00001% | PASS

dx4 | 5.2152e-07 | 5.2152e-07 | 5.68e-14 | 0.00001% | PASS

dx5 | 1.5329e-07 | 1.5329e-07 | 1.42e-14 | 0.00001% | PASS

Result: STAGE 10 VERIFICATION SUCCESSFUL

--- Evaluation Stage 11 ---

---------------------------------------------------------------------------------------

dx0 | -1.6166e+04 | -1.6166e+04 | 0.00e+00 | 0.00000% | PASS

dx1 | -6.5957e+03 | -6.5957e+03 | 4.88e-04 | 0.00001% | PASS

dx2 | 8.4309e+03 | 8.4309e+03 | 0.00e+00 | 0.00000% | PASS

dx3 | -5.1633e+02 | -5.1633e+02 | 6.10e-05 | 0.00001% | PASS

dx4 | -1.6644e+04 | -1.6644e+04 | 0.00e+00 | 0.00000% | PASS

dx5 | -1.4935e+04 | -1.4935e+04 | 1.95e-03 | 0.00001% | PASS

Result: STAGE 11 VERIFICATION SUCCESSFUL

--- Evaluation Stage 12 ---

---------------------------------------------------------------------------------------

dx0 | -5.8525e+00 | -5.8525e+00 | 0.00e+00 | 0.00000% | PASS

dx1 | 2.1006e+01 | 2.1006e+01 | 0.00e+00 | 0.00000% | PASS

dx2 | -5.8193e+00 | -5.8193e+00 | 4.77e-07 | 0.00001% | PASS

dx3 | -3.7216e+00 | -3.7216e+00 | 0.00e+00 | 0.00000% | PASS

dx4 | 3.7030e+00 | 3.7030e+00 | 2.38e-07 | 0.00001% | PASS

dx5 | -8.8215e+00 | -8.8215e+00 | 1.91e-06 | 0.00002% | PASS

Result: STAGE 12 VERIFICATION SUCCESSFUL

--- Evaluation Stage 13 ---

---------------------------------------------------------------------------------------

dx0 | -1.1918e-02 | -1.1918e-02 | 0.00e+00 | 0.00000% | PASS

dx1 | -2.1022e-01 | -2.1022e-01 | 0.00e+00 | 0.00000% | PASS

dx2 | 2.1907e-01 | 2.1907e-01 | 1.49e-08 | 0.00001% | PASS

dx3 | 1.3919e-01 | 1.3919e-01 | 1.49e-08 | 0.00001% | PASS

dx4 | 3.3976e-02 | 3.3976e-02 | 0.00e+00 | 0.00000% | PASS

dx5 | 2.6325e-01 | 2.6325e-01 | 2.98e-08 | 0.00001% | PASS

Result: STAGE 13 VERIFICATION SUCCESSFUL

--- Evaluation Stage 14 ---

---------------------------------------------------------------------------------------

dx0 | -8.0074e-04 | -8.0074e-04 | 5.82e-11 | 0.00001% | PASS

dx1 | -1.2933e-04 | -1.2933e-04 | 1.46e-11 | 0.00001% | PASS

dx2 | -7.0011e-04 | -7.0011e-04 | 5.82e-11 | 0.00001% | PASS

dx3 | -4.4820e-04 | -4.4820e-04 | 5.82e-11 | 0.00001% | PASS

dx4 | 1.4354e-03 | 1.4354e-03 | 2.33e-10 | 0.00002% | PASS

dx5 | 9.9713e-04 | 9.9713e-04 | 1.16e-10 | 0.00001% | PASS

Result: STAGE 14 VERIFICATION SUCCESSFUL

--- Evaluation Stage 15 ---

---------------------------------------------------------------------------------------

dx0 | -1.2129e-07 | -1.2129e-07 | 0.00e+00 | 0.00000% | PASS

dx1 | -1.0789e-07 | -1.0789e-07 | 7.11e-15 | 0.00001% | PASS

dx2 | -9.2761e-08 | -9.2761e-08 | 7.11e-15 | 0.00001% | PASS

dx3 | 3.2094e-08 | 3.2094e-08 | 3.55e-15 | 0.00001% | PASS

dx4 | 2.6175e-07 | 2.6175e-07 | 2.84e-14 | 0.00001% | PASS

dx5 | 4.5354e-08 | 4.5354e-08 | 3.55e-15 | 0.00001% | PASS

Result: STAGE 15 VERIFICATION SUCCESSFUL

--- Evaluation Stage 16 ---

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dx0 | 1.4931e+04 | 1.4931e+04 | 1.95e-03 | 0.00001% | PASS

dx1 | -4.9063e+03 | -4.9063e+03 | 9.77e-04 | 0.00002% | PASS

dx2 | -1.9776e+03 | -1.9776e+03 | 1.46e-03 | 0.00007% | PASS

dx3 | 9.5084e+02 | 9.5084e+02 | 1.83e-04 | 0.00002% | PASS

dx4 | -9.3475e+03 | -9.3475e+03 | 0.00e+00 | 0.00000% | PASS

dx5 | 1.5015e+04 | 1.5015e+04 | 1.95e-03 | 0.00001% | PASS

Result: STAGE 16 VERIFICATION SUCCESSFUL

--- Evaluation Stage 17 ---

---------------------------------------------------------------------------------------

dx0 | 7.2874e+00 | 7.2874e+00 | 9.54e-07 | 0.00001% | PASS

dx1 | 9.2726e-01 | 9.2726e-01 | 5.96e-08 | 0.00001% | PASS

dx2 | -1.1174e+00 | -1.1174e+00 | 1.19e-07 | 0.00001% | PASS

dx3 | 4.4355e+00 | 4.4355e+00 | 9.54e-07 | 0.00002% | PASS

dx4 | -6.3918e+00 | -6.3918e+00 | 4.77e-07 | 0.00001% | PASS

dx5 | -1.1807e+01 | -1.1807e+01 | 0.00e+00 | 0.00000% | PASS

Result: STAGE 17 VERIFICATION SUCCESSFUL

--- Evaluation Stage 18 ---

---------------------------------------------------------------------------------------

dx0 | -1.7359e-01 | -1.7359e-01 | 2.98e-08 | 0.00002% | PASS

dx1 | 4.5780e-02 | 4.5780e-02 | 3.73e-09 | 0.00001% | PASS

dx2 | -9.2813e-02 | -9.2813e-02 | 7.45e-09 | 0.00001% | PASS

dx3 | 1.1286e-01 | 1.1286e-01 | 7.45e-09 | 0.00001% | PASS

dx4 | -8.3688e-02 | -8.3688e-02 | 7.45e-09 | 0.00001% | PASS

dx5 | -2.3318e-01 | -2.3318e-01 | 1.49e-08 | 0.00001% | PASS

Result: STAGE 18 VERIFICATION SUCCESSFUL

--- Evaluation Stage 19 ---

---------------------------------------------------------------------------------------

dx0 | -3.4021e-04 | -3.4021e-04 | 0.00e+00 | 0.00000% | PASS

dx1 | -3.5369e-04 | -3.5369e-04 | 2.91e-11 | 0.00001% | PASS

dx2 | -1.5560e-04 | -1.5560e-04 | 1.46e-11 | 0.00001% | PASS

dx3 | 4.4890e-05 | 4.4890e-05 | 1.09e-11 | 0.00002% | PASS

dx4 | -4.8747e-04 | -4.8747e-04 | 2.91e-11 | 0.00001% | PASS

dx5 | 6.8514e-04 | 6.8514e-04 | 1.16e-10 | 0.00002% | PASS

Result: STAGE 19 VERIFICATION SUCCESSFUL

--- Evaluation Stage 20 ---

---------------------------------------------------------------------------------------

dx0 | 2.0101e-07 | 2.0101e-07 | 0.00e+00 | 0.00000% | PASS

dx1 | -8.7210e-08 | -8.7210e-08 | 7.11e-15 | 0.00001% | PASS

dx2 | 2.3425e-07 | 2.3425e-07 | 4.26e-14 | 0.00002% | PASS

dx3 | 1.1322e-07 | 1.1322e-07 | 1.42e-14 | 0.00001% | PASS

dx4 | -4.6798e-08 | -4.6798e-08 | 3.55e-15 | 0.00001% | PASS

dx5 | -3.0120e-07 | -3.0120e-07 | 0.00e+00 | 0.00000% | PASS

Result: STAGE 20 VERIFICATION SUCCESSFUL

--- Evaluation Stage 21 ---

---------------------------------------------------------------------------------------

dx0 | 1.7979e+03 | 1.7979e+03 | 7.32e-04 | 0.00004% | PASS

dx1 | -6.2103e+03 | -6.2103e+03 | 4.88e-04 | 0.00001% | PASS

dx2 | -5.9521e+03 | -5.9521e+03 | 4.88e-04 | 0.00001% | PASS

dx3 | -2.0323e+04 | -2.0323e+04 | 1.95e-03 | 0.00001% | PASS

dx4 | 6.1360e+03 | 6.1360e+03 | 4.88e-04 | 0.00001% | PASS

dx5 | 2.0742e+04 | 2.0742e+04 | 0.00e+00 | 0.00000% | PASS

Result: STAGE 21 VERIFICATION SUCCESSFUL

--- Evaluation Stage 22 ---

---------------------------------------------------------------------------------------

dx0 | -1.2361e+01 | -1.2361e+01 | 9.54e-07 | 0.00001% | PASS

dx1 | 2.5374e-01 | 2.5374e-01 | 5.96e-08 | 0.00002% | PASS

dx2 | 7.7677e+00 | 7.7677e+00 | 9.54e-07 | 0.00001% | PASS

dx3 | 4.4358e-01 | 4.4358e-01 | 1.49e-07 | 0.00003% | PASS

dx4 | 1.8846e+00 | 1.8846e+00 | 3.58e-07 | 0.00002% | PASS

dx5 | -8.9705e+00 | -8.9705e+00 | 0.00e+00 | 0.00000% | PASS

Result: STAGE 22 VERIFICATION SUCCESSFUL

--- Evaluation Stage 23 ---

---------------------------------------------------------------------------------------

dx0 | 1.8344e-01 | 1.8344e-01 | 0.00e+00 | 0.00000% | PASS

dx1 | -8.8963e-02 | -8.8963e-02 | 7.45e-09 | 0.00001% | PASS

dx2 | -1.6010e-01 | -1.6010e-01 | 0.00e+00 | 0.00000% | PASS

dx3 | -1.6253e-01 | -1.6253e-01 | 0.00e+00 | 0.00000% | PASS

dx4 | 5.5449e-02 | 5.5449e-02 | 0.00e+00 | 0.00000% | PASS

dx5 | 2.7877e-02 | 2.7877e-02 | 1.86e-09 | 0.00001% | PASS

Result: STAGE 23 VERIFICATION SUCCESSFUL

--- Evaluation Stage 24 ---

---------------------------------------------------------------------------------------

dx0 | 9.2261e-05 | 9.2261e-05 | 2.18e-11 | 0.00002% | PASS

dx1 | 7.7369e-07 | 7.7368e-07 | 1.94e-11 | 0.00251% | PASS

dx2 | -3.2994e-04 | -3.2994e-04 | 0.00e+00 | 0.00000% | PASS

dx3 | 3.7307e-05 | 3.7307e-05 | 1.46e-11 | 0.00004% | PASS

dx4 | 3.6785e-04 | 3.6785e-04 | 5.82e-11 | 0.00002% | PASS

dx5 | -3.3024e-04 | -3.3024e-04 | 2.91e-11 | 0.00001% | PASS

Result: STAGE 24 VERIFICATION SUCCESSFUL

--- Evaluation Stage 25 ---

---------------------------------------------------------------------------------------

dx0 | 1.6878e-07 | 1.6878e-07 | 0.00e+00 | 0.00000% | PASS

dx1 | 4.0881e-07 | 4.0881e-07 | 0.00e+00 | 0.00000% | PASS

dx2 | 1.9101e-08 | 1.9101e-08 | 0.00e+00 | 0.00000% | PASS

dx3 | 1.9733e-07 | 1.9733e-07 | 0.00e+00 | 0.00000% | PASS

dx4 | -2.8056e-07 | -2.8056e-07 | 2.84e-14 | 0.00001% | PASS

dx5 | 4.0201e-07 | 4.0201e-07 | 2.84e-14 | 0.00001% | PASS

Result: STAGE 25 VERIFICATION SUCCESSFUL

--- Evaluation Stage 26 ---

---------------------------------------------------------------------------------------

dx0 | 5.8002e+03 | 5.8002e+03 | 4.88e-04 | 0.00001% | PASS

dx1 | -1.5940e+04 | -1.5940e+04 | 1.95e-03 | 0.00001% | PASS

dx2 | 2.2676e+04 | 2.2676e+04 | 0.00e+00 | 0.00000% | PASS

dx3 | -2.5864e+04 | -2.5864e+04 | 1.95e-03 | 0.00001% | PASS

dx4 | -7.6250e+03 | -7.6250e+03 | 4.88e-04 | 0.00001% | PASS

dx5 | -6.1931e+03 | -6.1931e+03 | 1.46e-03 | 0.00002% | PASS

Result: STAGE 26 VERIFICATION SUCCESSFUL

--- Evaluation Stage 27 ---

---------------------------------------------------------------------------------------

dx0 | -1.0928e+01 | -1.0928e+01 | 0.00e+00 | 0.00000% | PASS

dx1 | -2.3813e+01 | -2.3813e+01 | 1.91e-06 | 0.00001% | PASS

dx2 | -1.3920e+01 | -1.3920e+01 | 0.00e+00 | 0.00000% | PASS

dx3 | -4.8236e+00 | -4.8236e+00 | 0.00e+00 | 0.00000% | PASS

dx4 | -1.0650e+01 | -1.0650e+01 | 9.54e-07 | 0.00001% | PASS

dx5 | 7.9652e+00 | 7.9652e+00 | 4.77e-07 | 0.00001% | PASS

Result: STAGE 27 VERIFICATION SUCCESSFUL

--- Evaluation Stage 28 ---

---------------------------------------------------------------------------------------

dx0 | -3.1236e-02 | -3.1236e-02 | 5.59e-09 | 0.00002% | PASS

dx1 | 2.0162e-01 | 2.0162e-01 | 2.98e-08 | 0.00001% | PASS

dx2 | 6.8856e-02 | 6.8856e-02 | 7.45e-09 | 0.00001% | PASS

dx3 | 2.6857e-01 | 2.6857e-01 | 2.98e-08 | 0.00001% | PASS

dx4 | -3.3002e-01 | -3.3002e-01 | 5.96e-08 | 0.00002% | PASS

dx5 | -8.3656e-02 | -8.3656e-02 | 1.49e-08 | 0.00002% | PASS

Result: STAGE 28 VERIFICATION SUCCESSFUL

--- Evaluation Stage 29 ---

---------------------------------------------------------------------------------------

dx0 | -9.1043e-04 | -9.1043e-04 | 0.00e+00 | 0.00000% | PASS

dx1 | 1.3721e-04 | 1.3721e-04 | 0.00e+00 | 0.00000% | PASS

dx2 | 6.1818e-04 | 6.1818e-04 | 5.82e-11 | 0.00001% | PASS

dx3 | -9.4596e-05 | -9.4596e-05 | 0.00e+00 | 0.00000% | PASS

dx4 | 4.7240e-05 | 4.7240e-05 | 1.09e-11 | 0.00002% | PASS

dx5 | -7.4590e-04 | -7.4590e-04 | 0.00e+00 | 0.00000% | PASS

Result: STAGE 29 VERIFICATION SUCCESSFUL

--- Evaluation Stage 30 ---

---------------------------------------------------------------------------------------

dx0 | -1.1534e-07 | -1.1534e-07 | 2.13e-14 | 0.00002% | PASS

dx1 | -1.3123e-07 | -1.3123e-07 | 2.84e-14 | 0.00002% | PASS

dx2 | -7.1549e-08 | -7.1549e-08 | 1.42e-14 | 0.00002% | PASS

dx3 | 2.7729e-07 | 2.7729e-07 | 0.00e+00 | 0.00000% | PASS

dx4 | 8.1359e-08 | 8.1359e-08 | 7.11e-15 | 0.00001% | PASS

dx5 | -2.8226e-08 | -2.8227e-08 | 8.88e-15 | 0.00003% | PASS

Result: STAGE 30 VERIFICATION SUCCESSFUL

=======================================================================================

FINAL REPORT: SUCCESS (All stages match within 0.01% error limit)

=======================================================================================

Licensing & Ordering Information

ACE808066 is delivered as a pre‑packaged Vivado IP core, ready for integration through the AMD/Xilinx IP Catalog.

Each licensed core includes:

Pre‑packaged Vivado IP (compatible with IP Catalog) including simulation model
Memory map documentation (available in this datasheet)
USER_KEY file for license activation
Example project for rapid integration

ACE provides a USER_KEY value (64 bits) for FPGA Serial Number (DNA for AMD/Xilinx).

The keys are delivered in a simple csv file (a template is reported below):

DNA_HEX,AUTHORIZATION_KEY

0011223344556677,C303E222F7D44C5B

ABCDE1234567890F,A2A3A3114194ED74

5566778899AABBCC,94C023F594AA6F63

DEADBEEF12345678,F40237F85DFB6F2A

00123456789ABCDE,E8ACBBDBFCF3ACB7

...............,.................

The user may store the file with all the SN/licenses and select the key to load after reading the SN of the FPGA from the BRAM_PORTA interface of the ACE808066 core.

The envisioned process is the following:

The file with the keys is embedded the customer software
The customer software, waiting at least 5000 ns from power on, reads the FPGA SN from the BRAM_PORTA interface exposed by the ACE808066 core.
The customer software retrieves the USER_KEY corresponding to the FPGA SN in the ACE provided USER_KEY file.
The customer software loads the USER_KEY via the BRAM_PORTA interface exposed by the ACE808066 core.

The keys are generated on customer order.

In simulation, a demo DNA is used and the corresponding USER_KEY is provided in the file for a seamless experience.

Pricing is provided directly by ACE based on:

Deployment volume
License type
Optional customization requirements
Target FPGA family

Customers may request a quotation by providing their expected deployment profile and FPGA device list.